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 INTEGRATED CIRCUITS
74LVT652 3.3V Octal transceiver/register, non-inverting (3-State)
Product specification Supersedes data of 1994 May 20 IC23 Data Handbook 1998 Feb 19
Philips Semiconductors
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting (3-State)
74LVT652
FEATURES
* Independent registers for A and B buses * Multiplexed real-time and stored data * 3-State outputs * Output capability: +64mA/-32mA * TTL input and output switching levels * Input and output interface capability to systems at 5V supply * Bus-hold data inputs eliminate the need for external pull-up * Live insertion/extraction permitted * No bus current loading when output is tied to 5V bus * Power-up 3-State * Power-up reset * Latch-up protection exceeds 500mA per JEDEC Std 17 * ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model resistors to hold unused inputs
DESCRIPTION
The LVT652 is a high-performance BiCMOS product designed for VCC operation at 3.3V. This device combines low static and dynamic power dissipation with high speed and high output drive. The 74LVT652 transceiver/register consists of bus transceiver circuits with 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes High. Output Enable (OEAB, OEBA) and Select (SAB, SBA) pins are provided for bus management.
QUICK REFERENCE DATA
SYMBOL tPLH tPHL CIN CI/O ICCZ PARAMETER Propagation delay An to Bn or Bn to An Input capacitance I/O capacitance Total supply current CONDITIONS Tamb = 25C; GND = 0V CL = 50pF; VCC = 3.3V VI = 0V or 3V Outputs disabled; VI/O = 0V or 3V Outputs disabled; VCC = 3.6V TYPICAL 2.8 2.6 4 10 0.13 UNIT ns pF pF mA
ORDERING INFORMATION
PACKAGES 24-Pin Plastic SOL 24-Pin Plastic SSOP Type II 24-Pin Plastic TSSOP Type I TEMPERATURE RANGE -40C to +85C -40C to +85C -40C to +85C OUTSIDE NORTH AMERICA 74LVT652 D 74LVT652 DB 74LVT652 PW NORTH AMERICA 74LVT652 D 74LVT652 DB 74LVT652PW DH DWG NUMBER SOT137-1 SOT340-1 SOT355-1
PIN CONFIGURATION
CPAB SAB OEAB A0 A1 A2 A3 A4 A5 1 2 3 4 5 6 7 8 9 24 23 22 21 20 19 18 17 16 15 14 13 VCC CPBA SBA OEBA B0 B1 B2 B3 B4 B5 B6 B7
PIN DESCRIPTION
PIN NUMBER 1, 23 2, 22 SYMBOL CPAB / CPBA SAB / SBA FUNCTION A to B clock input / B to A clock input A to B select input / B to A select input A to B Output Enable input (active-High) / B to A Output Enable input (active-Low) Data inputs/outputs (A side) Data inputs/outputs (B side) Ground (0V) Positive supply voltage
3, 21
OEAB / OEBA
4, 5, 6, 7, 8, 9, 10, 11 20, 19, 18, 17, 16, 15, 14, 13 12
A0 - A7 B0 - B7 GND VCC
A6 10 A7 11 GND 12
SV00051
24
1998 Feb 19
2
853-1748 18987
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting (3-State)
74LVT652
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
21 3 EN1(BA) EN2(AB) C4 G5 C6 G7
4
5
6
7
8
9
10 11
23 22 1 2
A0 A1 A2 A3 A4 A5 A6 A7 23 22 2 1 CPBA SBA SAB CPAB B0 B1 B2 B3 B4 B5 B6 B7 OEAB OEBA 3 21
4
1 1 6D 7
5 51
4D
20
1 2 19 18 17 16 15 14 13
17 20 19 18 17 16 15 14 13 5
SV00052
6 7 8 9 10 11
SV00053
LOGIC DIAGRAM
OEBA OEAB CPBA SBA CPAB SAB 21 3 23 22 1 2
Detail A; 1 of 8 Channels
1D C1 Q 20
A0
4 1D C1 Q
B0
A1 5 A2 6 A3 7 A4 8 A5 9 A6 10 A7 11
DETAIL A X 7
19 18 17 16 15 14 13
B1 B2 B3 B4 B5 B6 B7
SV00054
1998 Feb 19
3
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting (3-State)
74LVT652
The following examples demonstrate the four fundamental bus-management functions that can be performed with the 74LVT652. REAL TIME BUS TRANSFER BUS B TO BUS A REAL TIME BUS TRANSFER BUS A TO BUS B
The select pins determine whether data is stored or transferred through the device in real time. The output enable pins determine the direction of the data flow. STORAGE FROM A, B, OR A AND B TRANSFER STORED DATA TO A OR B
A
B
A
B
A
B
A
B
OEAB OEBA CPAB CPBA SAB SBA L L X X X L
FUNCTION TABLE
INPUTS OEAB L L X H L L L L H H H H L X * ** = = = = OEBA H H H H X L L L H H L CPAB H or L H or L X X X H or L H or L CPBA H or L H or L X H or L X X H or L SAB X X X ** X X X X L H H SBA X X X X X ** L H X X H An Input Input Unspecified** Output* Output Input Output DATA I/O Bn Input Unspecified** Output* Input Input Output Output OPERATING MODE Isolation Store A and B data Store A, Hold B Store A in both registers Hold A, Store B Store B in both registers Real time B data to A bus Stored B data to A bus Real time A data to B bus Store A data to B bus Stored A data to B bus Stored B data to A bus
High voltage level Low voltage level Don't care Low-to-High clock transition The data output function may be enabled or disabled by various signals at the OEBA and OEAB inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock. If both Select controls (SAB and SBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must be staggered in order to load both registers.
}
H H
OEAB OEBA CPAB CPBA SAB SBA X X L X
}
X L L H X H
OEAB OEBA CPAB CPBA SAB SBA X X X X X X X X
}
H L
OEAB OEBA CPAB CPBA SAB SBA H|L H|L H H
}
SV00055
1998 Feb 19
4
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting (3-State)
74LVT652
ABSOLUTE MAXIMUM RATINGS1,2
SYMBOL VCC IIK VI IOK VOUT IO OUT Tstg PARAMETER DC supply voltage DC input diode current DC input voltage3 VO < 0 Output in Off Output in Low state DC output current Output in High state Storage temperature range -64 -65 to +150 C VI < 0 CONDITIONS RATING -0.5 to +4.6 -50 -0.5 to +7.0 -50 -0.5 to +7.0 128 mA UNIT V mA V mA V
DC output diode current DC output voltage3
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS SYMBOL VCC VI VIH VIL IOH IOL DC supply voltage Input voltage High-level input voltage Input voltage High-level output current Low-level output current Low-level output current; current duty cycle 50%; f 1kHz t/v Tamb Input transition rise or fall rate; Outputs enabled Operating free-air temperature range -40 PARAMETER MIN 2.7 0 2.0 0.8 -32 32 64 10 +85 ns/V C MAX 3.6 5.5 V V V V mA mA UNIT
1998 Feb 19
5
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting (3-State)
74LVT652
DC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40C to +85C MIN VIK Input clamp voltage VCC = 2.7V; IIK = -18mA VCC = 2.7 to 3.6V; IOH = -100A VOH High-level output voltage VCC = 2.7V; IOH = -8mA VCC = 3.0V; IOH = -32mA VCC = 2.7V; IOL = 100A VCC = 2.7V; IOL = 24mA VOL Low-level output voltage VCC = 3.0V; IOL = 16mA VCC = 3.0V; IOL = 32mA VCC = 3.0V; IOL = 64mA VRST Power-up output low voltage5 VCC = 3.6V; IO = 1mA; VI = GND or VCC VCC = 3.6V; VI = VCC or GND VCC = 0 or 3.6V; VI = 5.5V II Input leakage current VCC = 3.6V; VI = 5.5V VCC = 3.6V; VI = VCC VCC = 3.6V; VI = 0 IOFF IHOLD Output off current Bus Hold current A inputs6 Current into an output in the High state when VO > VCC Power up/down 3-State output current3 VCC = 0V; VI or VO = 0 to 4.5V VCC = 3V; VI = 0.8V VCC = 3V; VI = 2.0V VCC = 0V to 3.6V; VCC = 3.6V IEX IPU/PD ICCH ICCL ICCZ ICC Additional supply current per input pin2 Quiescent supply current VO = 5.5V; VCC = 3.0V VCC 1.2V; VO = 0.5V to VCC; VI = GND or VCC; OE/OE = Don't care VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0 VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0 VCC = 3.6V; Outputs Disabled; VI = GND or VCC, IO = 0 VCC = 3V to 3.6V; One input at VCC-0.6V, Other inputs at VCC or GND 75 -75 500 60 15 0.13 3 0.13 0.1 125 100 0.19 12 0.19 0.2 mA mA A A I/O Data pins4 Control pins VCC-0.2 2.4 2.0 TYP1 -0.9 VCC-0.1 2.5 2.2 0.1 0.3 0.25 0.3 0.4 0.13 0.1 1.0 1.0 0.1 -1 1 150 -150 A 0.2 0.5 0.4 0.5 0.55 0.55 1 10 20 1 -5 100 A A V V V MAX -1.2 V UNIT
NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25C. 2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND 3. This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 3.3V 0.3V a transition time of 100sec is permitted. This parameter is valid for Tamb = 25C only. 4. Unused pins at VCC or GND. 5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. 6. This is the bus hold overdrive current required to force the input to the opposite logic state.
1998 Feb 19
6
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting (3-State)
74LVT652
AC CHARACTERISTICS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500; Tamb = -40C to +85C. LIMITS SYMBOL fMAX tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL PARAMETER Maximum clock frequency Propagation delay CPAB to Bn or CPBA to An Propagation delay An to Bn or Bn to An Propagation delay SAB to Bn or SBA to An Output enable time OEBA to An Output disable time OEBA to An Output enable time OEAB to Bn WAVEFORM MIN 1 1 2 3 5 6 5 6 5 6 5 6 150 1.8 2.0 1.2 1.0 1.4 1.4 1.0 1.0 2.2 1.8 1.0 1.2 1.7 1.5 VCC = 3.3V 0.3V TYP1 180 3.7 3.7 2.8 2.6 3.7 4.0 2.9 3.0 3.9 3.2 3.3 3.4 4.5 3.8 6.0 5.7 4.7 4.6 6.4 6.2 5.8 6.0 6.5 5.8 6.5 6.3 7.2 5.8 6.9 6.4 5.5 5.3 7.6 6.8 7.2 7.3 6.9 5.9 7.5 7.1 8.1 6.3 MAX VCC = 2.7V MAX MHz ns ns ns ns ns ns ns UNIT
tPHZ Output disable time tPLZ OEAB to Bn NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25C.
AC SETUP REQUIREMENTS
GND = 0V, tR = 2.5ns, tF = 2.5ns, CL = 50pF, RL = 500, Tamb =40 C to 85 C LIMITS SYMBOL PARAMETER WAVEFORM Min ts(H) ts(L) th(H) th(L) Setup time An to CPAB, Bn to CPBA Hold time 1 An to CPAB, Bn to CPBA
1
Tamb = +25oC VCC = +5.0V Typ 0.9 1.1 -1.0 -1.0 1.0 2.0 Max
Tamb = -40 to +85oC VCC = +5.0V 0.5V Min 1.6 2.5 0.0 0.0 3.3 3.3 Max
UNIT
4 4 1
1.5 2.2 0 0 3.3 3.3
ns ns ns
tw(H) Pulse width, High or Low tw(L) CPAB or CPBA NOTE: 1. This data sheet limit may vary among suppliers.
1998 Feb 19
7
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting (3-State)
74LVT652
AC WAVEFORMS
VM = 1.5V, VIN = GND to 2.7V
1/fMAX 2.7V
CPBA or CPAB
An or Bn
1.5V
1.5V tw(L)
1.5V 0V
tw(H) tPHL
tPLH 1.5V 1.5V
VOH
CPBA or CPAB
An or Bn
VOL
NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance.
SV00128
SV00056
Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency
OEBA
2.7V
SBA or SAB An or Bn
VM tPLH
VM 0V tPHL VM VM VOL VOH
OEAB
tPZH tPHZ
Bn or An
An or Bn
SV00126
Waveform 2. Propagation Delay, An to Bn or Bn to An, SAB to Bn or SBA to An
Waveform 5. 3-State Output Enable Time to High Level and Output Disable Time from High Level
OEBA
2.7V
SBA or SAB
VM tPHL
VM 0V tPLH VM VM VOL VOH
OEAB
tPZL tPLZ
An or Bn
An or Bn
SV00127
Waveform 3. Propagation Delay, SBA to An or SAB to Bn
Waveform 6. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level
1998 Feb 19
8
EEEEEEEEE EEE E EEEEEEEEE EEE E EEEEEEEEE EEE E
VM VM VM VM ts(H) th(H) ts(L) th(L) VM tw(L) VM
2.7V
0V
2.7V
0V
Waveform 4. Data Setup and Hold Times
2.7V VM VM 0V VOH VM VOH -0.3V 0V
SV00129
2.7V VM VM 0V
3V VM VOL +0.3V VOL
SV00130
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting (3-State)
74LVT652
TEST CIRCUIT AND WAVEFORM
VCC 6.0V Open VIN PULSE GENERATOR RT D.U.T. CL RL tTHL (tF) tTLH (tR) VOUT RL GND tW VM 10% 10% 0V tTLH (tR) tTHL (tF) 90% VM 10% tW 0V AMP (V) VM AMP (V)
90% NEGATIVE PULSE
90%
Test Circuit for 3-State Outputs
90% POSITIVE PULSE 10% VM
SWITCH POSITION
TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH SWITCH Open 6V GND
VM = 1.5V Input Pulse Definition
DEFINITIONS
RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
INPUT PULSE REQUIREMENTS FAMILY Amplitude 74LVT 2.7V Rep. Rate v10MHz tW tR tF
500ns v2.5ns v2.5ns
SV00092
1998 Feb 19
9
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting (3-State)
74LVT652
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
1998 Feb 19
10
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting (3-State)
74LVT652
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm
SOT340-1
1998 Feb 19
11
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting (3-State)
74LVT652
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm
SOT355-1
1998 Feb 19
12
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting (3-State)
74LVT652
NOTES
1998 Feb 19
13
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting (3-State)
74LVT652
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 05-96 9397-750-03545
Philips Semiconductors
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